1. Field of the Invention
The present invention relates to a photo-detector array device, and more particularly, to a photo-detector array device with a read-out integrated circuit (ROIC) monolithically integrated for a laser-radar image signal capable of simplifying manufacturing processes and greatly increasing yield, and a manufacturing method thereof.
This work was supported by the IT R&D program of MIC/IITA [2005-S-110-03, InGaAs Photo-detection Receiver Embedded with Three-Dimensional Distance/Image Signal Processing Integration Circuit].
2. Description of the Related Art
In a photo-detector array IC for detecting a laser-radar image signal in an eye-safe 1.55 μm IR band, photo-detection devices are arrayed to be electrically separated from each other. Two-dimensional electrical signals of the photo-detection devices are independently read out as optical-current signals, and after that, digital signal processing is performed on the optical-current signals so as to reproduce the image signal.
FIG. 1 is a circuit diagram illustrating a conventional photo-detector array IC_ (Integrated Circuit) for a laser-radar image signal.
Referring to FIG. 1, a conventional photo-detector array IC includes n×m photo-detection pixels 110 which are arrayed in a matrix to generate electric signals having values corresponding to an amount of incident light and a ROIC 120 disposed to one side of the array of n×m photo-detection pixels 110 to select outputs of the n×m electric signals. Each of the photo-detection pixels 110 includes a photodiode PD. The ROIC 120 includes m first NMOSFET NM1 and n second NMOSFETs NM2.
Each photodiode PD generates a current (or voltage) corresponding to an amount of the incident light.
Each first NMOSFET NM1 selects electric signals corresponding to the currents generated by the photodiodes PD in the row of the photo-detector array.
And, each second NMOSFET NM2 controls outputs of the electric signals applied to the second NMOSFETs NM2 in response to the output control signals selected by o-ctrl1 to o-ctrln.
In the conventional photo-detector array device IC, the photo-detection devices are implemented with InGaAs/InP-based photodiodes PD capable of detecting 1.55 μm light. The control devices for selecting the light detection and output of the photodiodes PD are implemented with NMOSFETs NM1 and NM2.
However, the NMOSFETs NM1 and NM2 are manufactured by using a silicon CMOS-based manufacturing process which is different from that of the InGaAs/InP-based photodiodes PD.
Therefore, in the conventional photo-detector array device IC, the photodiode array is manufactured in a flip chip form, and the NMOSFETs NM1 and NM2 are manufactured as silicon CMOS-based circuits. Next, these devices are packaged and integrated into one device.
However, the photodiode array and the NMOSFET-based ROIC are separately manufactured through different manufacturing processes, and after that, the photodiode array and the ROIC are packaged in one device. Therefore, a very complicated, difficult hybrid integration align process is needed so as to spatially align electrode structures of the photodiode and the NMOSFETs. As a result, the manufacturing processes for the photo-detector array IC become complicated and difficult. In addition, yield thereof becomes very low.
Furthermore, since a surface of PN junction of the photodiode is directly exposed, surface leakage current occurs with a high probability. Therefore, it is very difficult to implement ultra large scale integration of the photo-detector array device IC.